About a year ago I basically disappeared from the project, showing up only very intermittently to write up snippets of text as requested by the team. The reason was I was ramping up for my master's project, an attempt to put a GPU design on an FPGA. For those of you who do not know what FPGAs are, think of them as chips that you can modify the digital logic on to change its functionality. MIAOW, as the GPU was called, was originally created by I'd say 20-30% of a graduate level computer architecture course. As the semester was getting started and people were thinking about projects, AMD released the ISA to their Southern Islands GPU architecture and the group took that documentation and created the compute unit for the GPU, ie the main processing unit. They also produced a testing framework that allowed them to run OpenCL programs compiled to the SI instruction set.
After the semester concluded and about a semester later I joined in to see if we could put MIAOW on an FPGA. The main goal was to see how feasible the implementation was when we actually attempted to implement it in hardware. While a FPGA is not an ASIC by any means, it is close enough to help ferret out potential design issues. Needless to say, I found some. One rather irritating problem at the beginning was the inability of Xilinx's tools to synthesize a particular piece of logic. After I examined it, I noticed that the team had created a massive mux for what amounted to a bitshift operation. The toolchain simply could not figure out how to construct something that wide with the available logic and it wasn't smart enough to realize it was a shift operation. Once I made it explicit, that problem went away. Then we ran into a cycle delay issue with the register files. After that was solved, we ran into the really ugly beast, the memory interface. MIAOW's memory interface was something of a last minute combling together of something, anything, that would work at the end of the semester, so it did not really take into account what was actually feasible in a physical system. That entire interface needed a redesign, which had consequences throughout the pipeline. Yeah. But in the process I learned quite a bit about Xilinx's toolchain (omit cursing) and it landed me a job with the CMS group to do FPGA development with them. For that matter when I went in to interview for a different position with the CMS group, once the professor sitting in found out I knew how to use Xilinx's tools we ended up spending 3/4 of the interview talking about the other position instead.
Now the reason I bring up MIAOW is not just to explain why I basically disappeared for huge chunks of time last year. In fact, the title explains it quite well. MIAOW is, yes, an open source GPU implementation. It has been released under the 3-clause BSD license and can be found at the MIAOW github page. To take MIAOW from its current state to a fully-fledged graphics card that can do 3D hardware acceleration will take a lot more work, but much like an operating system needs a kernel to start with, the core is now there. The hope is that those interested will be willing to pitch in and help flesh out the additional functionality necessary so that perhaps one day we can have a fully functional completely open GPU.